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Distributed Process for Large Layout Hierarchy Management Disclosure Number: IPCOM000009375D
Publication Date: 2002-Aug-20

Publishing Venue

The Prior Art Database


Distributed processing approaches for handling large integrated circuit layouts are described. By paralellizing the process and further by interleaving set up (recognition of instances that need processing) with the processing (e.g. optical proximity correction, phase shifting design, etc.) large speed improvements can be achieved.