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DQS Timing Calibration Based on High-Speed Capture of a Deterministic Data Pattern

IP.com Disclosure Number: IPCOM000009387D
Publication Date: 2002-Aug-20

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that improves Dual Data Rate SDRAM (DDR) read operations with a process that detects data arrival in relation to the MCH memory core clock. Benefits include cost reductions and simplified read operations.