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Disclosed is a method that allows the control signals associated with DRAM memory to be dynamically tuned for a variety of silicon and board designs. Benefits include a reduction
English (United States)
This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately
60% of the total text.
Dynamic Tuning of Control Signals
Associated with DRAM Memory Using the Off-Centering Algorithm
Disclosed is a method that allows the control signals
associated with DRAM memory to be dynamically tuned for a variety of silicon
and board designs. Benefits include a reduction
In current technology, the tuning of various control signals
associated with DRAM is done using fixed tables within the firmware. This
requires that the firmware be updated periodically to change the tables, based
on silicon and board validation discovery. The existing methods occasionally
cause errors in the firmware, and require very close interaction between the
validation teams and the firmware teams.�
The disclosed method combines existing silicon features that
tune control signals, along with a software algorithm that performs memory
operations at various register settings (see Figure 1). The algorithm detects
whether the memory write/verify operation passes or fails in order to locate
the optimal setting. The algorithm initializes the memory controller tuning
registers to the end-point value, then progresses through the available values
until the memory write/verify operation passes. It then continues to progress
through the remaining settings until the operation begins to fail. Next, the
“pass” value is stress-tested in the firmware by applying corner case data
patterns and addresses to determine whether the setting is the most reliable.
The most relia...