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PROCESS FOR ETCHING TIWNx BARRIER FILM IN THE PRESENCE OF PB-SN SOLDER

IP.com Disclosure Number: IPCOM000009876D
Original Publication Date: 2000-May-01
Included in the Prior Art Database: 2002-Sep-25

Publishing Venue

Motorola

Related People

Authors:
Lakshmi N. Ramanathan Doug Mitchell

Abstract

A flip chip interconnection system was developed using the following steps: I) sputtering a TiWNx barrier layer, (2) sputtering a Cu electroplating bus layer, (3) covering the whole wafer with photoresist, followed by development of photoresist to expose the bond pads, (4) electroplating a Cu stud on the sputtered Cu layer exposed over the bond pads, (5) electroplating Pb~Sn solder as an alloy (either eutectic or high-Pb), (6) stripping the photoresist, (7) selectively etching the Cu bus layer (in the presence of the Pb-Sn solder), (8) selectively stripping the TiWNx sputtered layer, and (9) reflowing the solder reflowed under appropriate conditions.