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METHOD FOR CONTROLLING CIRCUIT PERFORMANCE OVER VARIATIONS IN PROCESS, VOL TAGE, AND TEMPERATURE

IP.com Disclosure Number: IPCOM000009878D
Original Publication Date: 2000-May-01
Included in the Prior Art Database: 2002-Sep-25
Document File: 2 page(s) / 97K

Publishing Venue

Motorola

Related People

Authors:
Fujio Takeda

Abstract

In MOS circuits, propagation delays and MOS FET drive strengths generally varies three to four times over the manufactured process variation (P), operating temperature (T), and power supply voltage Cy). Having less PTV-dependent delay or driver strength circuits are often desirable in many applications. In many cases, it is not an easy task to minimize these variations. For example, IIO designers have been spending a significant amount of time for minimizing simultaneous switching noise, EMC (Electro Magnetic Compatibility), transmission line effect at the best case corner, while meeting propagation delay requirements at the worst case corner.