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Publication Date: 2002-Oct-17

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Key Words Trench, substrate contact, trench capacitor, coupling, bypass Background High-density bypass capacitors are of great importance in modern integrated circuits as they help reduce costs, help reduce variability associated with external components and also provide for more flexible design methodology. Trench capacitors are possible candidates for high-density, on-chip bypass applications. In addition, low-resistance, top-side contacts to a highly doped substrate are also desirable, and quite common in bipolar and BiCMOS technology platforms. The availability of a good substrate contact also helps improve the quality factor (Q) of trench bypass capacitors. For semiconductor processing, the substrate contacts and the trench capacitors are typically created from two separate trench etch modules. A reason for this is to avoid coating the open trench with photoresist when defining the substrate contacts from the trench capacitors. The “two-etch” approach increases both the processing time and the manufacturing cost for the product. The “single-trench-etch” approach involving photoresist can contaminate the trenches if any residual resist remains after cleaning. In addition, photoresist is an expensive material and can add to the manufacturing cost. Furthermore, from a device engineering perspective, one node of the conventional trench capacitor is necessarily tied to the substrate. This restricts one of the capacitor terminals to a fixed bias, and thereby reduces the range of circuit applications. There is a need to create trench capacitors and substrate contacts using one trench etch process, in order to reduce both the process cycle time and the manufacturing cost. Also, if a trench capacitor can be constructed to permit the free biasing of both electrodes, it may be used for coupling applications in addition to bypass applications. Coupling capacitors need to have good isolation from the substrate (a high Q value), and a high specific capacitance. Trench capacitors, by construction, have a high capacitance per footprint area. Without loss of generality, consider a BiCMOS technology platform consisting of a highly doped buried layer (which may be localized or blanket across the wafer), and beneath it a lightly-doped region that separates it from a highly-doped substrate. Isolation of the floating capacitor from the substrate region may be improved by suitably controlling the thickness and doping concentration in the -layer. Thus, availability of a high-density “floating” trench capacitor can add a lot of value to a technology platform. It must be noted that typical capacitance density for integrated coupling capacitors (such as a planar metal-insulator-metal capacitor) is in the range of 1-5fF/-m2, depending on the nature of the dielectric used and on various other geometry parameters. A floating trench capacitor can potentially improve this by 5X or even 10X, depending on the breakdown voltage and the thickness of dielectric used. This is especially important in the high-frequency product arena, where design-wins are often the result of having better passives, rather than active devices. Invention Summary This invention uses trench sidewall spacers to define a substrate contact, a grounded trench capacitor and a floating trench capacitor by altering the width of the trench opening on a mask layer. It is well known that the depth of a trench from a single etch process is related to the width of the trench opening. Depending on the width-range in question, the depth can be either a weak function or a strong function of the opening size. The invention takes advantage of this fact to create different trench depths for building capacitor structures that can be tied to the substrate or tied to another region (i.e. a buried layer). Furthermore, the substrate contact and all of the trench capacitor structures are created simultaneously from the same method. Another advantage is that this technique avoids exposing any trench to photoresist. The “floating” trench capacitor structure uses a sidewall spacer and is shallow enough to not contact the substrate. This provides a capacitor that can have multiple applications since the outside (bottom) terminal contacts a “buried” layer, which, unlike the substrate, can be independently biased and locally isolated using isolation trenches or masked implants.