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Method for ATPG for scan designs with multiple clock domains and different scan styles of sequential memory elements

IP.com Disclosure Number: IPCOM000010252D
Publication Date: 2002-Nov-13

Publishing Venue

The IP.com Prior Art Database

Abstract

Method for automatic test pattern generation (ATPG) for scan designs with multiple clock domains and different scan styles of sequential memory elements. Benefits include an improved design environment and an improved test environment.