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Active ESD Protection Disclosure Number: IPCOM000011804D
Publication Date: 2003-Mar-17

Publishing Venue

The Prior Art Database


A problem in current CMOS technology is devising a means for protection of CMOS devices from electro-static discharge (ESD) events at low cost with little or no performance degradation. This challenge becomes even more difficult when integrating CMOS devices with other high power device technologies like bipolar or the like. When integrating device technologies, providing effective ESD protection is complicated by the integration, as effective operation can be severely limited by the ESD protection method. Without effective ESD protection, the device may provide erroneous operation, or fail. Traditionally, it has been difficult to integrate a Radio Frequency (RF) detector with a power amplifier (PA) controller as there are challenging performance specifications that must be met for successful operation that can be greatly effected by the means to provide ESD protection. For example, a typical requirement for ESD protection of an RF input in CMOS technology may require effective protection of a device operating in the range of 450 MHz to about 2.5 GHz or more. Furthermore, low parasitic capacitance is required, as well as low harmonic distortion. Existing methods of providing ESD protection for CMOS suffer from high parasitic capacitance (which makes them poor candidates for RF) and non-linear behavior (causing unfavorable signal harmonic distortion). Since using non ESD protected devices is not an attractive solution to the customers for at least the aforementioned reasons, it is therefore desirable to devise a new means to provide active ESD protection.