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Method of improving leakage current in a MOS transistor Disclosure Number: IPCOM000012079D
Original Publication Date: 2003-Apr-07
Included in the Prior Art Database: 2003-Apr-07

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Vishnu Khemka Vijay Parthasarathy Ronghua Zhu Amitava Bose Todd Roggenbauer


This publication proposes a novel scheme to improve the leakage current in MOS transistors in deep sub-micron technologies with shallow source/drain implants. The technique is specifically suitable for smart power technologies where, low-voltage CMOS devices are integrated with medium and high-voltage analog devices.