SMT memory subsystem dispatch serialization
Original Publication Date: 2003-May-19
Included in the Prior Art Database: 2003-May-19
Disclosed is a method for a hard serialization boundary for a given instruction at Dispatch in an SMT processor core. In particular, the method ensures that an instruction will not be dispatched until the entire processor core is idle with respect to that thread's older instructions and that there are no outstanding instructions in the memory subsystem for that thread.