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Debug Dispatch, NTC, NTCP1 flushes by thread

IP.com Disclosure Number: IPCOM000012661D
Original Publication Date: 2003-May-19
Included in the Prior Art Database: 2003-May-19

Publishing Venue

IBM

Abstract

For hardware debug in an SMT processor core, a means is needed to flush instructions in a thread specific manner, without flushing the other thread. This debug flushing could be done at various points in the instruction pipeline. Disclosed is a method for debug flushing in a thread specific manner at Dispatch, Completion, or prior to Completion, from various debug sources.