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LAN POWER MANAGEMENT Disclosure Number: IPCOM000012999D
Original Publication Date: 1999-Dec-01
Included in the Prior Art Database: 2003-Jun-12

Publishing Venue


Related People

Kazuo 2 Fujii Takashi 2 Yanagisawa


Disclosed is a circuit which enable a lower power consumption design in Network Interface Card (NIC). It becomes very common that Notebook PC to have NIC included in it, now a days. It becomes more important that NIC to have more advanced power management feature, especially to achieve lower power consumption while the system is in suspend mode. The figure shows a block diagram of the NIC and an idea of this disclosure. The NIC is consist of tree main blocks, LAN Controller, PHY and Magnetic. The PHY is consist of two part, a DRIVER, which drive the LAN transmit signal and a RECEIVER, drive the LAN Receive signal. This PHY consumes about 300mW of power and to lower the total system power consumption, it is very important to turn this PHY when it is not being used, that means if the NIC is not connected to a Network. However, here is a contradiction,, the PHY need to be powered on to detect the NIC is connected to a Network, it result in consuming much power. Once PHY is powered off, the NIC can not receive a link packet and it can not detect if it is connected to a Network. :P. The figure shows an idea of this disclosure. A mechanical switch to be placed at the RJ45 Jack and the switch makes(ON) when a LAN cable is connected to the Jack. The ON/OFF signal, the signal name is "RJ45IN#" in the figure, of the switch is connected to PHY or LAN controller. In case a LAN cable is not connected to the RJ45 jack, the "Shutdowm_LAN" signal becomes high. When a PHY chip detect the signal input is High, its shut down all the power in it. The LAN controller may impelement the same type of power management feature to achieve the lowest power consumption. :etdbdoc. 1