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Efficient electrical test method for chip-carrier printed circuit board Disclosure Number: IPCOM000013018D
Original Publication Date: 2000-Aug-01
Included in the Prior Art Database: 2003-Jun-12

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Disclosed is an efficient method for the electrical testing for the printed circuit board in which many chip carrier patterns are arranged. This method uses the special test fixture which has plural testing heads on the step and repeat type tester. This makes easier to test very fine pattern carrier products and the productivity is not so decreased comparing with current method. In the electrical test for printed circuit cards, the dedicated type test fixture is used. The fixture has a lot of testing probes which contact to the pad patterns on the card and testing its all circuits simultaneously. But it becomes more difficult to make such fixture as the circuit pattern becomes finer and the pad pattern pitch becomes closer, because of the physical limitation comes from the probe diameter, accuracy of drilling the fixture, etc. In such case the fixture is sometimes divided to plural test fixtures. One fixture tests open defects of some circuits in the card and the other fixture tests short defects and open defects of the rest for example. But this means that the productivity is decreased comparing with one fixture testing. Especially in the case of the chip carrier products on which many piece patterns are arranged, this is big concern. This method solves the problem by using the fixture which has plural test heads on the step and repeat type tester. The following figures are the examples which show the efficiency of this method. Fig. 1 shows the two pass test using two different fixtures on the step and repeat type tester. In this case total 12 times tests are needed to complete all pieces on one card. Fig. 1 2pass test as present method 6 pieces/sheet card case