Spread-spectrum techniques for high-speed serial loops
Original Publication Date: 2000-Dec-01
Included in the Prior Art Database: 2003-Jun-18
High speed serial communication protocols such as Gigabit Ethernet and Fibre Channel rely on each node on the loop being phase-locked to a common reference to enable the clock to be extracted from the data signal. Each node therefore has its own reference, which must be accurate to the nominated frequency to within a few parts per million. One unwanted side-effect of this architecture is a large component of single-frequency electro-magnetic radiation, which must be suppressed using often costly techniques. The idea described here outlines a way that spread-spectrum clocking techniques could be applied to high-frequency networks such as this to reduce the EMI emissions at source. The concept is described in the context of Fibre Channel arbitrated loops (FC-AL), although the ideas can be easily extendable to other serial standards and topologies. On power-up of a FC-AL loop, the loop undergoes an initialisation process by which a map of the loop is built and each node on the loop is assigned a loop physical address. This process is repeated on any event which causes a loop reset (for instance, an element is added or removed from the loop). At the start of an initialisation sequence, each node in the loop uses its own reference oscillator to generate its own loop reference frequency (as at present). During the initialisation process, an additional initialisation stage would be used to decide which node was to be the Frequency Master. From this point, all other nodes would lock only to the incoming serial stream for clock recovery, and not the local reference. The Frequency Master would then enable spread spectrum to its oscillator, typically allowing less than one percent of downspread on the nominal link clock rate. The spread spectrum frequency range would be small enough not to cause a lock problem for the phase-locked loops in the other nodes. The entire FC-AL network would now be operating synchronised to a single spread-spectrum clock source, with resulting reductions in EMI. On a loop reset, all nodes would revert to standard, non-spread operation until the initialisation phase was complete again.