High speed module interface in a single companion clock environment
Original Publication Date: 2000-May-01
Included in the Prior Art Database: 2003-Jun-18
Disclosed is a mechanism that allow an ATM layer module to sample correctly receive data sent by a framer module. Utopia standard requires that the ATM layer provides both transmit and receive clocks to the framer. On the transmit side, transmit data are sent along with transmit clock that acts as a companion clock and allow correct data sampling at the framer side. On the receive side, receive data are sent without companion clock leading to problem of sampling in the ATM layer. Utopia bus is typically switching at 104 Mhz but in the current application, the bus is switching at 125 Mhz. The mechanism proposes to create a receive clock path in the ATM layer and framer modules so that the delay variations are minimum (figure).