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Browse Prior Art Database

Method to implement memory in a file for modelling and simulation

IP.com Disclosure Number: IPCOM000013563D
Original Publication Date: 2003-Jun-18
Included in the Prior Art Database: 2003-Jun-18

Publishing Venue

IBM

Abstract

While writing a BFM or modelling any I/O device for simulation purpose, user always expect it to do the data sanity check. For example, if it is a master device user want it to do the data checking when it receives data for any read transaction, and if it is a slave device user would expect it to do data checking for the data written by the master device and also supply the data for a read transaction requested by the master device. The most common way to do it by declaring a big memory type element in the HDL code and save address and corresponding data. But there are several problems involved in using this. The method described below discusses those problems and how this new method avoids them.