Browse Prior Art Database

Fast diagnostics for RAM

IP.com Disclosure Number: IPCOM000013668D
Original Publication Date: 2000-May-01
Included in the Prior Art Database: 2003-Jun-18

Publishing Venue

IBM

Abstract

Disclosed is a device firmware that reduces time for testing memory area without any performance degradation. After power on, a device tests work area (Power-On-Self -Test). The basic idea is that minimum work area for starting device is tested first, the remains will be tested after device ready then expand work area. This new method consists 2 ideas: 1. Separating test sequence, during spindle start and after Power-On-Ready. 2. Expanding work area Power-On-Self-Test for DRAM is performed during waiting time of spindle start for reducing Power-On-Ready time. Current products have small DRAM so the waiting time for spindle start is enough for DRAM self test. But follow on products have bigger DRAM, the testing time is bigger than waiting time. This causes expansion of Power-On-Ready time. To reduce Power-On-Ready time, the test procedure is separated. For the first time, a device tests minimum work area and this takes less time than waiting for spindle start. After Power-On-Ready the remaining is tested during device idle, then expand work area.