Cableless Systems Management Connector
Original Publication Date: 2000-Jul-01
Included in the Prior Art Database: 2003-Jun-18
This invention disclosure describes a cableless Systems Management Connector. Internal cable management in Netfinity and other vendors' servers can be extremely difficult from the customer's perspective. There are power, SCSI, I/O, Systems Management, and many other cables. These cables come loose during shipping, increase cost, are mechanically difficult to route, and can create EMI problems. This invention disclosure will remove the need for a special Systems Management cable by creating a new internal connector. In addition to using the PCI signals, PCI Systems Management adapters need to communicate through sideband signals to access planar hardware. Traditionally, these sideband signals are run through a ribbon cable that connects down to the planar. The signals are for "out-of-band" management of the server. This is when the system is powered off and the PCI bus cannot be used for communication between the adapter and the host processor. There is an auxiliary power source that powers both the system's circuitry usually I 2C devices )and the adapter that allow the out-of-band communication to take place. Removing the cable decreases cable management problems and it lowers additional cost to the system bill of material. Since the mechanical packaging differs for many servers, varying cable lengths may be needed to simplify routing. This leads to having to support multiple part numbers in addition to having lower volume, higher cost cables. The cable link also creates EMI issues and requires capacitive decoupling to reduce noise emissions inside the box. Replacing the systems management cable and implementing a cableless connection will improve cable management inside the box, reduce the system cost, and minimize internal EMI emissions. The "out-of-band" (sideband) signals are routed through the PCI connector taking advantage of the existing unused and reserved pins in section 4.4.1 of PCI Local Bus Specification Revision 2.2. The table below shows the unused and reserved PCI pins and the Systems Management sideband signals that are connected to these pins.