Browse Prior Art Database

Large Real Support Test Vehicle Disclosure Number: IPCOM000013806D
Original Publication Date: 2001-Oct-27
Included in the Prior Art Database: 2003-Jun-18

Publishing Venue



VIrtual COMplex (VICOM) is a modified version of VM/ESA specifically adapted to support in-house testing through simulation. A new machine is planned to provide support for large real, 64-bit arithmetic and 64-bit virtual by implementing the ESAME architecture. Concurrent with the hardware development, software is being developed which requires some or all of the ESAME architecture support. There are not enough ESAME-capable processors available for software testing early enough to meet delivery schedules. VICOM alone cannot provide the necessary high performance simulation involving Dynamic Address Translation (DAT) tables that are not supported by the underlying hardware. In order to mitigate performance overhead of 100X CPU consumption and at least 5X elapsed time, a G3 processor with specially modified microcode to handle the ESAME format DAT tables is created to run VICOM. This Bring up vehicle (BUV) allows VICOM to avoid full-simulation mode most of the time, reducing degradation to a negligible level. The combination of BUV and VICOM can be used to efficiently simulate a large part of the ESAME architecture. The ESAME architecture subset which can be simulated in the time frame before the hardware is available, is, for the most part, the whole architecture with the exception of actual real storage above 2GB, and minor instruction limitations. VICOM provides the simulation of many of the hardware status elements such as 64-bit Control Registers, 64-bit General Purpose Registers, etc. It simulates the new ESAME instructions, and provides full simulation when the guest is executing in 64-bit addressing mode. It also intercepts and simulates a number of translation-related instructions which will not be fully implemented by the BUV, such as test protection (TPROT). The G3 BUV will support Dynamic Address Translation using the ESAME format segment table designator, segment tables, and page tables, as well as providing extensions to the translation-related instructions load real address (LRA), and invalidate page table entry (IPTE). It will recognize the ESAME format ASN second table enty (ASTE) and entry table entry (ETE) during access register (AR) and address space number (ASN) translation and in the instructions: program call (PC), program return (PR), program transfer (PT), load address space parameters (LASP), set secondary ASN (SSAR), and branch in subspace group (BSG). It will also support movepage (MVPG) when both operands are backed by central storage. This support is only required under system interpretive execution (SIE). The support for the new microcode is enabled dynamically by the VICOM operating system through bits in the SIE state descriptor based on guest enablement through a control program (CP) command interface. The G3 continues to support S/390 ESA architecture for guests that have not enabled the new support. 1