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Method and apparatus for analyzing the performance of multiple execution units in a processor

IP.com Disclosure Number: IPCOM000013927D
Original Publication Date: 2001-Jan-01
Included in the Prior Art Database: 2003-Jun-19

Publishing Venue

IBM

Abstract

Method and apparatus for analyzing the performance of multiple execution units in a processor Disclosed is Method and apparatus for analyzing the performance of multiple execution units in a processor. In a modern processor with multiple units of a particular type, it is desirable from a performance analysis point of view to be able to count the total number of operations of a particular type from each of the units that complete during a clock cycle. This disclosure provides a mechanism to combine events from similar units, look at the individual unit events, or any combination thereof, and reduce the amount of Performance Monitor Unit (PMU) resources.