Browse Prior Art Database

MOTHERBOARD WIRING METHOD TO OPTIMIZE USB CONTROLLER BANDWIDTH

IP.com Disclosure Number: IPCOM000014479D
Original Publication Date: 1999-Jul-01
Included in the Prior Art Database: 2003-Jun-19

Publishing Venue

IBM

Related People

Authors:
Resnick, RA

Abstract

Motherboard Wiring method to optimize USB controller bandwidth This invention describes a method for wiring the Current PC motherboards use "south bridge" chips that have one USB (Universal Serial Bus) controller and 2 ports connected to that controller. The Intel PIIX4E* chip is an example of this. Over time the industry standard south bridge chips will contain 2 or more USB controllers each with 2 or more USB ports connected to each for a total of 4 or 5 USB ports per south bridge. USB ports can run at either low or high speeds and it is detrimental to system performance to have 2 high speed devices connected to one controller. The ideal configuration to optimize system performance is to have a mixture of low and high speed devices connected to a single controller. Current motherboards wire both ports that are connected to a single controller to one set of connectors. This invention uses a method of wiring the south bridge chip and its USB ports to the USB connectors on the motherboard so that customers will be naturally forced to plug a mixture of low and high speed devices on to a single controller and not multiple high speed devices on to a single controller. Figure: Current: