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Priority control for Router's Buffer Disclosure Number: IPCOM000014919D
Original Publication Date: 2001-Jun-25
Included in the Prior Art Database: 2003-Jun-20

Publishing Venue



Priority controlling is required on Router and Switch. Priority is usually judged by Header(protocol number etc.) of IP packet. It is easy to realize priorty controlling by using to control memory. It makes up priority controlling with buffer memory, memory controller , unused FIFO , On-going address register and Last-storing register. Each two register is assigned for each priority. Buffer memory is divided with each 512byte block.(fig.1) Last 4 byte of this block is assigned for next address and length. Next address means address for next connected block and length means used byte number of this block. If packet size is more than 508 byte , write connected block address at "next address" and write ffffh at "length". On-going register is used as pointer for next output of each priority and Last-storing register is used as pointer for next storing of each priority.