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RAID Controller Peak Sustained Stress Test Disclosure Number: IPCOM000015056D
Original Publication Date: 2002-Jun-08
Included in the Prior Art Database: 2003-Jun-20

Publishing Venue



A program is disclosed that exercises a RAID controller to a sustainable and reproducible high level of performance. The RAID controller under test consists of four Fibre Channel devices, two processor based DMA channels, and a cache controller with a variable amount of memory attached. The cache controller additionally contains an XOR engine. This test initializes all of cache memory with a repeating 8KB data pattern. The cache memory size is then divided into four equal size continuous segments. A small portion at the beginning of the first cache segment is then reserved for various control scripts. Each Fibre Channel device is assigned a unique cache segment. The Fibre Channel devices are physically connected so there are two independent loops each containing two devices. On each loop, the test determines an Initiator and a Target based on the test input parameters. Each Initiator transmits data to its' Target until a failure occurs or the test is terminated. Initiators read data from their cache segment while Targets write received data into their segment. The Targets do not attempt to verify the received data. All Fibre Channel devices read/write data as prescribed in a control script. Upon completion of a given script, the script restarts itself. While the Fibre Channel devices are executing, the XOR portion of the Cache Controller is continuously reading and XORing the 8KB blocks of data. This is what verifies the transferring data remains correct. The XOR script controls which blocks of cache are XORed and is also a continuous loop.