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High Frequency On-Wafer Calibration Method with Enhanced Accuracy

IP.com Disclosure Number: IPCOM000015308D
Original Publication Date: 2002-Jan-11
Included in the Prior Art Database: 2003-Jun-20

Publishing Venue

IBM

Abstract

The proposed solution describes a method for on-wafer calibration of high frequency two-port measurements. In particular, it is well suited for use in Silicon processes (CMOS and/or SiGe) and describes a way to determine the accuracy of a high frequency measurement by controlling the accuracy of a DC resistance measurement. Advantages are that this method allows the acurate de-embedding of active and passive CMOS and SiGe devices to very high frequencies. It is also very beneficial that no well controlled on-wafer resistors or transmission lines with known impedances have to be available. It is especially suited for calibrations on lossy substrates, a situation typically found when using CMOS processes. The problem is solved by applying a TRL calibration of unknown reference impedance to the measurement of a passive device (nominal resistor). This measurement is extrapolated to DC frequency and compared with the value of a DC resistance measurement. The comparison of the extrapolated value with the value measured at DC allow the determination of the reference impedance and the complex impedance over frequency of the passive device (resistor). The dielectric loss of the transmission line is estimated for low frequencies and for high frequencies based on known principle behaviour of a transmission line and the measured loss. This loss estimation significantly enhances the accuracy of the calibration at very high frequences. Based on the knowledge of the TRL calibration coefficients, a LRM calibration my be performed. The following is a high level step-by-step algorithmic desctiption .