Browse Prior Art Database

Techniques for Minimizing Chip Area Costs for a Hardware-based Search Engine Disclosure Number: IPCOM000015589D
Original Publication Date: 2002-Jan-13
Included in the Prior Art Database: 2003-Jun-20

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The proposal involves several techniques for improving the cost-efficiency of a hardware-based search engine by reducing the chip area needed to implement the search engine. The proposal relates specifically to a search engine that is based on the BART (Balanced Routing Table) search algorithm. Two versions of the BART algorithm for SRAM and wide embedded memory technologies are presented in [1] and [2]. The proposed techniques are applicable to both versions of the BART algorithm. [1] J. van Lunteren, "Searching Very Large Routing Tables In Fast SRAM," IEEE Int'l Conf. on Computer Communications and Networks "ICCCN 2001", Phoenix, AZ, October 15-17, 2001. [2] J. van Lunteren, "Searching Very Large Routing Tables in Wide Embedded Memory," Globecom 2001, The Evolving Global Communications Network, San Antonio, TX, November 25-29, 2001.