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Automatic Reset of a Processing Unit after a Parity Check without loosing Error Data

IP.com Disclosure Number: IPCOM000015827D
Original Publication Date: 2002-Mar-18
Included in the Prior Art Database: 2003-Jun-21

Publishing Venue

IBM

Abstract

Introduction: Registers of a processing unit are protected with additional hardware against soft or hard errors. Even or odd parity generation and checking is a very common approach to detect this kind of errors. The occurrence of parity checks lead to an error condition which is indicated to software. Software is then responsible to handle and reset the error condition in hardware. The current hardware approach automatically performs a reset of the processing hardware unit after the occurrence of a parity check and provides the requesting unit the error data for fault analysis.