Dismiss
InnovationQ and the IP.com Prior Art Database will be updated on Sunday, December 15, from 11am-2pm ET. You may experience brief service interruptions during that time.
Browse Prior Art Database

Method for a noise rejection circuit that incorporates logic blanking and timed hysteresis control to eliminate false triggering due to noisy input signals

IP.com Disclosure Number: IPCOM000016694D
Publication Date: 2003-Jul-09

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a noise rejection circuit that incorporates logic blanking and timed hysteresis control to eliminate false triggering due to noisy input signals. Benefits include improved performance.