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Method And Apparatus For Reducing Current Mirroring Loss In High-Gate-Leakage MOS Circuits

IP.com Disclosure Number: IPCOM000016764D
Publication Date: 2003-Jul-14

Publishing Venue

The IP.com Prior Art Database

Abstract

In a MOS-based current mirror circuit configuration, current mirroring loss is mitigated by disconnecting the gate and drain of a diode connected MOS transistor and reference node (the drain of the original diode-connected MOS transistor) and its source node at the gate connection of the original diode connected MOS transistor. The drain of the additional transistor is tied to a low-impedance voltage source. In addition, a diode-connected MOS device of an opposite type may be connected to the drain node to reduce the voltage level present at the drain node, in order to mitigate undesirable high-voltage supply effects which have the potential to casue hot-electron effects and larger than desired current.