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An Alignment Builtin to allow a compiler to generate safe load/stores Disclosure Number: IPCOM000018650D
Original Publication Date: 2003-Jul-30
Included in the Prior Art Database: 2003-Jul-30
Document File: 1 page(s) / 49K

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Disclosed is a builtin to allow a compiler to generate safe load/stores. This invention allows a user to specify at a given point in the program that an address is known to be aligned. This may allow the compiler to generate instructions that will not fail due to alignment restrictions.

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An Alignment Builtin to allow a compiler to generate safe load/stores

    Some computer hardware disallows memory accesses to unaligned memory addresses. Problems may also be caused by hardware that disallows accesses that cross cache line boundaries. On some systems, this may be permitted, but emulated in hardware/software at a performance penalty. For many addresses, such as globals and locals, the compiler knows the alignment of the address, and prove that the instruction will never cause alignment problems. Other addresses may come from pointers or parameters, and it may not be possible to tell if the address is misaligned. This may prevent use of load/store instructions that have alignment restrictions.

A new builtin is added to the language. Here is an example in C/C++: void __alignx (int align, const void *address);

This is an assertion to the compiler that at the location of the builtin, the address is known to be aligned with alignment of at least align. Align is generally a positive power of 2. This can be used as follows:

void p (double *d) {

if ((unsigned long) d & 0xF) {

/* unaligned code */

__align (16, d); /* d is known to be aligned on a 16 byte boundary, an therefore so is d[2], etc. */ /* aligned code */

} else {



The compiler can use data flow techniques to know that it is safe to use load/store instructions that assume that d is 16 byte aligned. No executable code is associated with the builtin. It may also be provided as a #pragma directive, o...