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Exception age determination on a SMT Superscalar Processor.

IP.com Disclosure Number: IPCOM000018882D
Original Publication Date: 2003-Aug-19
Included in the Prior Art Database: 2003-Aug-19

Publishing Venue

IBM

Abstract

On a Out-of-Order SMT Architecture we execute speculative interrupts and we need to keep track of the architectural register states of the oldest interrupt per threads. Instead of using the common out-of-order mechanisms like register rename or roleback, we use the Age detection method to maintain those architectural registers e.g. DAR(Data address register) and DSISR(Data Storage Interrupt Status Register.)