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Low-Current Fusing Control/Simulation for ASICs without SPI Disclosure Number: IPCOM000019685D
Original Publication Date: 2003-Oct-25
Included in the Prior Art Database: 2003-Oct-25

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Currently, to simulate and verify the consequences of fusing (parameter adjustment) of an ASIC (Application-Specific Integrated Circuit) prior to making the necessary physical cuts of the fuses to make the adjustment permanent, a SPI (Serial Peripheral Interface) is used. This means that a test pattern must be loaded into the SPI at a special reserved address in order to observe the effect of the loaded test pattern. One disadvantage of this method is that sometimes an ASIC concept may not need a SPI for normal functional activities. Furthermore, each fuse requires a pull-down current source to define the voltage level at the output when the fuse is cut. When a fuse has not been cut, this pull-down current source contributes to the ASIC's current consumption during operation. If an ASIC concept has many possible stages of fusing with many individual fuses in total, the current consumption of the sample during operation is much greater than designed, and compared to its fellow samples where fusing has occurred. To avoid the use of an ASIC SPI, we propose to incorporate a dedicated shift register for the input of the test (adjustment) pattern to be simulated against the change in the physical parameters to be adjusted. After the physical parameter has been measured and a test pattern has been calculated to give the necessary adjustment, the test pattern is loaded into the shift register, and then finally the parameter is re-measured to confirm that the adjustment meets the expectation. Once the correct test pattern for a given sample is determined, the fuses in this sample can be cut and the adjustment becomes permanent.