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Efficient Implementation of Integrated Branch Metric Unit for Equalizer and Convolution Decoder

IP.com Disclosure Number: IPCOM000020063D
Original Publication Date: 2003-Oct-22
Included in the Prior Art Database: 2003-Oct-22

Publishing Venue

Motorola

Related People

Authors:
Mohit K. Prasad Arnab K. Mitra Nitin Vig Gaurav Davra Amritpal Singh

Abstract

An efficient realization of a common circuitry for computing the branch metrics of a GMSK equalizer and a Viterbi decoder such that the rest of the hardware (ACS and trace-back units) can be shared.