Browse Prior Art Database

Side-Partial Growable Voltage Island Die for LSI Chip Disclosure Number: IPCOM000021133D
Original Publication Date: 2003-Dec-26
Included in the Prior Art Database: 2003-Dec-26
Document File: 1 page(s) / 42K

Publishing Venue



This voltage island structure for LSI die with peripheral I/Os can resolve three problems as shown below. With this growable structure, users can place as many I/O cells with different Vdd as they want depending on users application requirements. 1. Users can put core-logic of different Vdds in the voltage islands on the same die. 2. Users can turn on/off each growable voltage island independently for power management 3. Users can place I/O cells with different Vdd voltage at any die-sides of the growable voltage islands

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 1

Side-Partial Growable Voltage Island Die for LSI Chip

1. Each growable voltage island can be automatically generated by defining X,Y length and A,B origin and C,D aspect ratio by user request.
2. Each core-logic Vdd is fed from peripheral I/Os for voltage supply.
3. I/O cells with the same Vdd can be placed anywhere along the die-side of each island.
4. This voltage island structure allows the basic concept of SiP ( System in Package or Multi-Chip-Module) in a single die.
5. To communicate among core-logic in different voltage islands, users need to use fencing logic using Global-Power-Bus.

Global Power Bus for fencing logic should be implemented as shown below

Side-Partial Growable Voltage-Island Die







Vdd Power-Bus


I/O Cell



Global Power-Bus for Fencing Logic



[This page contains 6 pictures or other non-text objects]