Built-In Self-Test (BIST) and user logic sharing method using FPGA
Original Publication Date: 2003-Dec-26
Included in the Prior Art Database: 2003-Dec-26
BIST is used to test SRAM, DRAM, and other hard macros. After wafer/module test, BIST is not used. If BIST can be replaced by an user logic when normal function, the cell count can be reduced. This document shows how to share BIST and a user logic to embedded FPGA.