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Method for cascode bias in cascode emitter coupled logic circuits Disclosure Number: IPCOM000021480D
Original Publication Date: 2004-Jan-20
Included in the Prior Art Database: 2004-Jan-20

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Bipolar logic circuits implemented in low BVceo technologies require cascode devices to prevent device breakdown. Disclosed here is a method to bias the cascode devices without the use of an external bias generator circuit.