Browse Prior Art Database

Method for cascode bias in cascode emitter coupled logic circuits

IP.com Disclosure Number: IPCOM000021480D
Original Publication Date: 2004-Jan-20
Included in the Prior Art Database: 2004-Jan-20

Publishing Venue

IBM

Abstract

Bipolar logic circuits implemented in low BVceo technologies require cascode devices to prevent device breakdown. Disclosed here is a method to bias the cascode devices without the use of an external bias generator circuit.