A verification method for ASIC design using FPGA with embedded microprocessors
Original Publication Date: 2004-Feb-09
Included in the Prior Art Database: 2004-Feb-09
Disclosed is a method for verifying ASIC design using Field Programmable Gate Array (FPGA) with embedded microprocessors. A hardware component described at different abstraction levels, such as register-transfer level and higher abstraction levels, are mapped to hardware logics and embedded microprocessor of the FPGA, and verified.