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A verification method for ASIC design using FPGA with embedded microprocessors

IP.com Disclosure Number: IPCOM000021783D
Original Publication Date: 2004-Feb-09
Included in the Prior Art Database: 2004-Feb-09

Publishing Venue

IBM

Abstract

Disclosed is a method for verifying ASIC design using Field Programmable Gate Array (FPGA) with embedded microprocessors. A hardware component described at different abstraction levels, such as register-transfer level and higher abstraction levels, are mapped to hardware logics and embedded microprocessor of the FPGA, and verified.