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Innovative method to extract TATER Info with Non-Functional System for CSP Testing

IP.com Disclosure Number: IPCOM000022450D
Original Publication Date: 2004-Mar-15
Included in the Prior Art Database: 2004-Mar-15

Publishing Venue

IBM

Abstract

The PC industry for the past several years has been plagued with various quality issues dealing with early life failures. These failures are induced by various factors in the industry including out of spec environments, tier two capacitors, HDD failures, etc. The TATER (Time And Temperature Event Recorder) system is a method of recording data to a piece of NVM (Non volatile memory) on the system. The issue is removing the data from the system when all power rails to the system do not come up due to the failure mechanism. This describes an innovative method of removing the data without needing more than the 5Vsb voltage on the planar. Other voltages may not be present because the system will not power on. The PC systems need +/- 12 Volts to power the serial bus transceivers.