CLOCK SHIFT REGISTER IN FLOPPY DISC DRIVE CONTROLLER
Original Publication Date: 1977-Dec-31
Included in the Prior Art Database: 2004-Mar-31
Xerox Disclosure Journal
When writing data on a track sector, a data address byte is recorded preceded by 6 bytes of binary zeros. The data address byte has selected clock pulses missing. A clock shift register of 8-bit length is included in the controller. During the time zeros are written, the register is loaded with the proper clock pattern for the data address byte. Once the data address byte has started to be written, the register shifts out and is reloaded with binary ones so that all following bytes will have clock bits present.