IMAGE SCALING USING BIT THROW-AWAY MEMORY
Original Publication Date: 1980-Dec-31
Included in the Prior Art Database: 2004-Apr-02
Xerox Disclosure Journal
To implement image reduction in electronic imaging systems, a pixel throw-away is ordinarily used. Large Scale Integrated (LSI) circuits work well for this applicationwithin certain limits. Two difficulties which exist, however, are that the Transistor Transistor Logic (TTL) Binary Rate Multipliers (BRMs) presently available will not work at high data rates (i.e., 25 MHz is a typical maximum) and some applications require that not only the number of pixels to be deleted be known but also require that the pixels to be deleted be identified. While the BRM approach behaves precisely, it is difficult to calculate before hand exactly which pixels are to be deleted.