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Power Reduction In Trace-back Unit Using Orthogonal Memory Bank

IP.com Disclosure Number: IPCOM000028022D
Original Publication Date: 2004-Apr-19
Included in the Prior Art Database: 2004-Apr-19

Publishing Venue

Motorola

Abstract

A technique to address the problem of power wasted in accessing bits known a priori to be irrelevant to the trace-back process by selectively isolating portions of the memory where the trace-back bit is stored. This is done by orthogonally splitting the memory into smaller banks so that only required bank is enabled during the trace-back to minimise power.