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Input Buffer Circuit for High Voltage Tolerant I/Os Using Low Voltage Tolerant Transistors

IP.com Disclosure Number: IPCOM000028042D
Publication Date: 2004-Apr-21

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses a circuit for a 5V tolerant I/O input buffer, which separates the propagation path of the high and low voltages and protects the MOS devices without noise margin impacts.