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High Bandwidth, Low Latency, Pulse Multiplexed Output Subsystem

IP.com Disclosure Number: IPCOM000028498D
Publication Date: 2004-May-17

Publishing Venue

The IP.com Prior Art Database

Abstract

A high bandwidth, low latency, pulse multiplexed output subsystem is disclosed. In one particular exemplary embodiment, the output subsystem may comprise a plurality of pulse generators, a first pair of transistors forming a first differential transistor pair, a second pair of transistors forming a second differential transistor pair, a third pair of transistors forming a differential output driver, a first pair of resistive loads, a second pair of resistive loads, a first current source, and a second current source.