Browse Prior Art Database

Associative Processor Disclosure Number: IPCOM000028621D
Original Publication Date: 2004-May-25
Included in the Prior Art Database: 2004-May-25

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Conditional branches are important instructions that can have a significant impact on the performance of conventional and future pipelined and superscalar processor architectures. In contrast to a lot of recent research, which has been focussed on efficient branch prediction schemes, the presented concept addresses the performance impact of condition branch instructions in a more fundamental way through a tighter integration of condition evaluation functionality into the processor architecture.