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Micro-Controller Based Reliability Assessment of Sub-100 nm MOS Technologies Disclosure Number: IPCOM000028956D
Original Publication Date: 2004-Jul-25
Included in the Prior Art Database: 2004-Jul-25

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The reliability of MOS (Metal Oxide Semiconductor) technologies is commonly evaluated by using either a semiconductor parameter analyzer or Source Measurement Units (SMUs). The reliability evaluation of sub-100 nm MOS may require sense measurements for breakdown verification on large scale transistor arrays. Because these measurements are normally carried out sequentially, fast measurements are needed to keep the duration of the evaluation low. Unfortunately, when testing a single electrical circuit the aforementioned devices need time in the order of a few milliseconds due to the limitation of the general purpose interface bus (GPIB). Thus, improvements on the speed are necessary. In order to improve on the measurement speed a test circuit as illustrated in figure 1 is proposed. The device under test (DUT) is connected to the main circuit elements consisting of a micro-controller, Digital to Analog Converter (DAC), Analog to Digital Converter (ADC), analog circuits (current to voltage (I-V) converter) and a device selection unit. Finally the micro-controller is connected to a PC via USB or RS232 (serial port).