The method of building of full-duplex serial synchronous communication means based on special cycle buffer.
Original Publication Date: 2004-Sep-16
Included in the Prior Art Database: 2004-Sep-16
This paper is devoted to improvement of serial synchronous device and driver architecture. The serial synchronous devices are full duplex serial ports, which are used to communicate between microcontrollers and peripheral devices. Such communication is typically established to transfer data on high sampling rate, thus serial synchronous interface is a bottleneck of microcontrollers performance. The proposed architecture reduces interface overhead and optimize implementation.