Browse Prior Art Database

SINGLE STEPPING CO-PROCESSOR OPERATIONS FOR DESCRIPTOR DEBUGGING

IP.com Disclosure Number: IPCOM000031769D
Original Publication Date: 2004-Oct-08
Included in the Prior Art Database: 2004-Oct-08

Publishing Venue

Motorola

Related People

Authors:
Tom Tkacik Lawrence Case

Abstract

We designed an encryption co-processor with a DMA that reads programmable linked-list style of descriptors chains to execute a series of cryptographic functions. It became apparent early in the design phase that with little observability into the hardware's inner workings, locating and fixing errors in the descriptor chain would be difficult. Each chain is a series of descriptors and each descriptor itself usually involves a set of complex tasks that due to various internal processing rates and factors may execute in a sequence that is not easy to predict. To make debugging easier we developed a mode for stepping through the execution of the descriptor chain. Each step performs a hardware-generated operation, often a bus transaction such as fetching a link or writing data, or sometimes waiting for a buffer to become available. After each operation the co-processor is stalled and we can see what the hardware is "thinking next" in a status register. The next operation is made visible in a set of debug registers when the debug mode is entered. It is based upon the current descriptor, controller, accelerator, and buffer states. When a software driver was being developed for this module, this fine-grained control and observability over the descriptor chain execution helped answer many questions quickly and undoubtably sped up the development time.