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Smart Power Integrated Circuit Design Architecture with Enhanced High-Side Breakdown Voltage Disclosure Number: IPCOM000032246D
Original Publication Date: 2004-Oct-26
Included in the Prior Art Database: 2004-Oct-26

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Vishnu Khemka Vijay Parthasarathy Ronghua Zhu Amitava Bose


In this disclosure we propose a novel and unique process design architecture directly applicable to smart power integrated circuits, for achieving very high high-side breakdown voltage without enhancing process complexity. The technique is specially suited to smart power platforms where high-voltage devices are integrated with low and medium voltage devices using deep trench based isolation.