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Placement of Fibre Channel Loads to Optimize Power Sequencing for Availability

IP.com Disclosure Number: IPCOM000032753D
Original Publication Date: 2004-Nov-11
Included in the Prior Art Database: 2004-Nov-11

Publishing Venue

IBM

Abstract

The Power Supply capacity design requirements are constrained by the capacity required to supply the load under the most demanding conditions. For disk enclosures the worst case conditions are during the power on phase where the starting currents for the disk drive modules (DDMs) must be supplied, the normal running current requirements are far less than requirements to support the DDM motor starting surge requirements. In order to support limiting the power supply capacity the SFF-8045 Specification section 6.4.6 allows for implementing a staggered starting sequence for DDMs (power supply loads) by setting the values of the START_2/MATED & START_1/MATED interface bits. This can result in a delay in starting the DDM motor loads due to the starting sequence algorithm. By designing the DDM interface to the system, and the system DDM population ordering rules such that the starting sequence rules power on the DDM slots in an optimal order, the system startup time can be optimized.