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Browse Prior Art Database

Self-Identifying CPU and Bus Structures

IP.com Disclosure Number: IPCOM000033528D
Original Publication Date: 2004-Dec-14
Included in the Prior Art Database: 2004-Dec-14

Publishing Venue

IBM

Abstract

This article will present a self-identification method for use in logic simulation models. The method is used for complex multi-core or multi-bus System-on-Chip (SoC) and ASIC designs running in an event simulation environment. The approach is currently used in IBM's System-on-Chip platform based design kits.