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Inline Device Structure and Method for Evaluating Negative Bias Temperature Instability (NBTI) for Silicon-On-Insulator (SOI)

IP.com Disclosure Number: IPCOM000033546D
Original Publication Date: 2004-Dec-16
Included in the Prior Art Database: 2004-Dec-16

Publishing Venue

IBM

Abstract

In advanced semiconductor technologies, Negative Bias Temperature Instability (NBTI) is becoming the main degradation mechanism of concern. The invention proposed in this article uses heating in the silicon body of Silicon-on-Insulator (SOI) devices to heat the channel area of P-MOSFETs to an appropriate level to generate measurable NBTI degradation. This is important to develop in-line tests that can monitor NBTI quickly and efficiently. The method of heating the silicon body is by using transistors which share the same silicon body with the device under test (DUT) to heat the silicon body by self-heating effects. Other methods of heating (such as using silicides on the silicon body as resistive heaters) may be used to similarly raise the local temperature in the silicon.